We developed two hardware architectures at BTC. The Occlusion Array (called BILD) is an abstract, array-based logic simulator. It's silicon implementation is not competitive with ASIC designs, however it does provide a novel software architecture for deduction, that can be instantiated on a parallel machine.

The occlusion array algorithm has been tested on over 200 ISCAS/MCNC benchmark circuits. CM85A, a 4-bit magnitude comparator, is described in depth.

Occlusion arrays can be constructed in standardized forms such as Sum-of-Products (Conjunctive Normal) or maximally nested (Implicate Normal) forms. The array layout can also be optimized for minimal wiring. Occlusion arrays are also interesting because they provide a visual format that clearly illustrates semiconductor design trade-offs for area, delay, and wiring.

The BILD simulator implementation code is of interest because it is pedagogical, that is, it is executable while the syntax and the semantics are human readable in a near-English format.